This invention relates, in general, to phase locked loops and, more particularly, to discriminator circuits for phase locked loops.
A phase locked loop is used to maintain a constant phase between input and output signals. If these two signals are out of phase the output of the phase detector is adjusted to compensate for this and places the signals in phase. A phase locked loop, generally, can only adjust an output signal if it is within a certain frequency range of the incoming signal. If the differences in the output and input phases fall outside this range additional circuitry is needed to assist the PLL in locking onto the phase of the incoming signal. This additional circuitry is generally called a discriminating circuit, or frequency loop, and is used to provide course tuning to the PLL where the PLL itself provides a fine tuning.
Once the input and output signal frequencies fall within the range of the fine tuning of the PLL, the discriminating circuit, or frequency loop, must be decoupled from the PLL itself. This is done with the use of a disabling circuit. The disabling circuits now known in the art have an excessive amount of parts requiring more space and higher cost.